This page describes the Sega Mapper, while a few other obscures mappers were used (notably by Codemasters) they are not addressed here.
Master System Memory Limitations
The Z80 CPU on the Sega Master System has a 16bit address bus, and therefore a 64KB address space. Only the lower 48KB of this space is mapped to the cartridge ROM. Any game larger than 48KB needs additional hardware to allow the use of the larger ROMs as well as battery-backed SRAM. The Sega Mapper was developed to address these limitations and is used by 99% of games larger than 48KB. Some games included the mapper as a separate IC (as seen to the right), while others had it integrated into the mask ROM.
The Sega Mapper splits the 48KB cartridge address space into 3 Slots of 16KB each:
- Slot 0: 0x0000 -> 0x3FFF
- Slot 1: 0x4000 -> 0x7FFF
- Slot 2: 0x8000 -> 0xBFFF
Each Slot mapping register is 6bits wide and can specify any 1 of 64 ROM 16KB segments, allowing a ROM up to 8 MEGA POWER (1MB) to be used. The Sega Mapper also allows up to 32KB of cartridge SRAM to be used, split into 2 16KB segments as well.
Interrupt Vector Protection
A useful feature of the Sega Mapper is that it protects the Z80 Interrupt Vectors by disallowing mapping on the first 1KB (0x0000 -> 0x03FF) of Slot 0. This means that, invariant of which ROM segment Slot 0 is assigned to, 0x0000 -> 0x03FF will always point to the first 1KB of cartridge ROM.
Registers
The Sega Mapper is operated by four registers found at the very top of the Z80's address space. They are in fact located in the RAM mirror and therefore can be read back by software.
0xFFFC - RAM Mapping and Miscellaneous Functions
| Bit 7 |
Bit 6 |
Bit 5 |
Bit 4 |
Bit 3 |
Bit 2 |
Bit 1 |
Bit 0 |
| ROM Write Enable |
Unused |
Unused |
RAM Enable (0xC000-0xFFFF) |
RAM Enable (0x8000-0xBFFF) |
RAM Bank Select |
Bank Shift 1 |
Bank Shift 0 |
- Bit 7 - ROM Write Enable has no effect on a real game, it was probably used by RAM development carts
- Bit 6,5 - Unused
- Bit 4 - RAM Enable - When '1', Cartridge RAM will be mapped into the 0xC000 -> 0xFFFF range used by the in-console RAM. The in-console RAM needs to be disabled using port 0x3E in order to avoid bus contention
- Bit 3 - RAM Enable - When '1', Cartridge RAM will be mapped into Slot 2 (0x8000 -> 0xBFFF), this takes precedence over any ROM banking specified in 0xFFFF
- Bit 2 - RAM Bank Select - When '0', Cartridge RAM mapped in Slot 2 is lower 16KB of RAM, when '1' upper 16KB of RAM is mapped
- Bit 1,0 - Bank Shift - Not known to be used by any software
0xFFFD, 0xFFFE, 0xFFFF - ROM Mapping
While the mapper describes ROM segment assignment in all 3 slots, most games only use mapping in Slot 2.
| Register Address |
Power-Up Value |
Start of Range |
End of Range |
| 0xFFFD (Slot 0) |
0x00 |
0x0400* |
0x3FFF |
| 0xFFFE (Slot 1) |
0x01 |
0x4000 |
0x7FFF |
| 0xFFFF (Slot 2) |
0x02 |
0x8000 |
0xBFFF |
* due to interrupt vector protection
Example:
- If 0x00 is written to 0xFFFF, then cartridge ROM 0x000000 -> 0x003FFF is seen at 0x8000 -> 0xBFFF
- i.e. Slot 2 points to ROM segment 0
- If 0x12 is written to 0xFFFE, then cartridge ROM 0x048000 ->0x04BFFF is seen at 0x4000 -> 0x7FFF
- i.e. Slot 1 points to ROM segment 18
- If 0x0C is written to 0xFFFC, then cartridge RAM 0x4000 -> 0x7FFF is seen at 0x8000 -> 0xBFFF
- i.e. Slot 2 point to RAM segment 1, regardless of value in 0xFFFF
|
|